DESIGN, ANALYSIS AND SIMULATION OF CNTFET BASED SRAM CELLS.
- Department Of ECE, K L University, Guntur, Andhra Pradesh, India.
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This paper presents design, analysis and simulation of emerging memory device i.e. Static Random Access Memory (SRAM) cell. In nano-range devices, Carbon nanotubes field effect transistor (CNTFET) has shown a outstanding performance. CNTFET has been proved as better replacement for silicon devices. The characteristics of CNTFETs at different channel lengths and at different technologies are designed and analyzed. Complete current transport model is developed from carrier concentration in CNT for different chirality. The model describes the variation of charge developed on CNT with gate voltage. I-V characteristics have been efficiently modeled and compact model is developed for HSPICE circuit simulations. Finally 6T and 8T SRAM cell is designed with developed model and analysis is done for various performance metrics. Results show that CNTFET based 6T and 8T-SRAM consumes very less standby power with high static noise margins.
- Sheng Lin, Yong-Bin Kim and Fabrizio Lombardi Young Jun Lee, "A New SRAM Cell Design Using CNTFETs", International SoC Design Conference, 2008.
- Rasmita Sahoo and R. R. Mishra," Simulations of Carbon Nanotube Field Effect Transistors", International Journal of Electronic Engineering Research ISSN 0975- 6450 Volume 1 Number 2 pp. 117?125, 2009.
- Dang, L. Anghel, R. Leveugle, "CNTFET Basics and Simulation", IEEE, 2006.
- Julia Van Meter Cline," Characterization of Schottky Barrier Carbon Nanotube Transistors and their Applications to Digital Circuit Design", Massachusetts Institute of Technology 2004.
- Stanford CNTFET Model, https://nano.stanford.edu/stanford-cnfet-model.
- S. Bhat," Design and Modelling of Different SRAM?s Based on CNTFET 32nm technology", International Journal of VLSI design & Communication Systems (VLSICS) Vol.3, No.1, February 2012.
- Sheng Lin, Yong-Bin Kim and Fabrizio Lombardi, "Design of a CNTFET-Based SRAM Cell by Dual-Chirality Selection", IEEE TRANSACTIONS ON NANOTECHNOLOGY, VOL. 9, NO. 1, JANUARY 2010.
- Raychowdhury and K. Roy, ?Carbon-nanotube-based voltage-mode multiple-valued logic design,? IEEE Trans. Nanotechnol., vol. 4, no. 2, pp. 168?179, Mar. 2005.
- Maisagalla Gopal, D Siva Sankar Prasad, Balwinder Raj, " 8T SRAM Cell Design for Dynamic and Leakage Power Reduction", International Journal of Computer Applications (0975 ? 8887) Volume 71? No.9, May 2013.
[V. Sai Raghav, Ch.V.N.S.S.Ravi Krishna, V. Soundarya, Sk. Brahmiah and M. Durga Prakash1. (2017); DESIGN, ANALYSIS AND SIMULATION OF CNTFET BASED SRAM CELLS. Int. J. of Adv. Res. 5 (Apr). 1562-1570] (ISSN 2320-5407). www.journalijar.com
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